Intel Outlines Plan for Future Supercomputers at International Supercomputing Conference
EUC with HCI: Why It Matters
As mind-boggling as it seems, it's only a matter of several years before enterprises will be dealing with exabyte-level data stores.
That's correct: storage of billions of billions of bytes in on-site disks and in the cloud. High-definition video and data cargo from scientific research projects, health care imaging, and oil and gas exploration data stores are leading the way here.
Intel, ever the forward-looking IT pioneer, is committed to helping supply the processing power to handle all this new data and satisfy its shareholders at the same time. A year ago, it commissioned a division dedicated to MIC (Many Integrated Core) exascale supercomputing architecture. The so-designated "Knights Corner" processor, introduced in June 2010 and planned for the company's upcoming 22-nanometer chip line, is the foundation for this initiative. It is expected to become available next year.
On June 20 at the ISC (International Supercomputing Conference) in Hamburg, Germany, Intel outlined a plan to use Knights Corner and its MIC foundation to provide widespread exascale-type computing for parallel applications within nine years.
Using the MIC architecture, Intel believes it can empower supercomputers -- and eventually enterprise servers -- to carry out as many as quintillions (a quintillion is 1,000 raised to the power of six, or a cardinal number 10^18) of computer operations per second. This is hundreds of times faster than current supercomputers can move.
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